155 #define RTE_ETHDEV_HAS_LRO_SUPPORT
158 #ifdef RTE_LIBRTE_ETHDEV_DEBUG
159 #define RTE_ETHDEV_DEBUG_RX
160 #define RTE_ETHDEV_DEBUG_TX
164 #include <rte_compat.h>
172 #include <rte_config.h>
176 #include "rte_dev_info.h"
178 extern int rte_eth_dev_logtype;
180 #define RTE_ETHDEV_LOG(level, ...) \
181 rte_log(RTE_LOG_ ## level, rte_eth_dev_logtype, "" __VA_ARGS__)
246 #define RTE_ETH_FOREACH_MATCHING_DEV(id, devargs, iter) \
247 for (rte_eth_iterator_init(iter, devargs), \
248 id = rte_eth_iterator_next(iter); \
249 id != RTE_MAX_ETHPORTS; \
250 id = rte_eth_iterator_next(iter))
290 #define RTE_ETH_LINK_SPEED_AUTONEG 0
291 #define RTE_ETH_LINK_SPEED_FIXED RTE_BIT32(0)
292 #define RTE_ETH_LINK_SPEED_10M_HD RTE_BIT32(1)
293 #define RTE_ETH_LINK_SPEED_10M RTE_BIT32(2)
294 #define RTE_ETH_LINK_SPEED_100M_HD RTE_BIT32(3)
295 #define RTE_ETH_LINK_SPEED_100M RTE_BIT32(4)
296 #define RTE_ETH_LINK_SPEED_1G RTE_BIT32(5)
297 #define RTE_ETH_LINK_SPEED_2_5G RTE_BIT32(6)
298 #define RTE_ETH_LINK_SPEED_5G RTE_BIT32(7)
299 #define RTE_ETH_LINK_SPEED_10G RTE_BIT32(8)
300 #define RTE_ETH_LINK_SPEED_20G RTE_BIT32(9)
301 #define RTE_ETH_LINK_SPEED_25G RTE_BIT32(10)
302 #define RTE_ETH_LINK_SPEED_40G RTE_BIT32(11)
303 #define RTE_ETH_LINK_SPEED_50G RTE_BIT32(12)
304 #define RTE_ETH_LINK_SPEED_56G RTE_BIT32(13)
305 #define RTE_ETH_LINK_SPEED_100G RTE_BIT32(14)
306 #define RTE_ETH_LINK_SPEED_200G RTE_BIT32(15)
307 #define RTE_ETH_LINK_SPEED_400G RTE_BIT32(16)
313 #define RTE_ETH_SPEED_NUM_NONE 0
314 #define RTE_ETH_SPEED_NUM_10M 10
315 #define RTE_ETH_SPEED_NUM_100M 100
316 #define RTE_ETH_SPEED_NUM_1G 1000
317 #define RTE_ETH_SPEED_NUM_2_5G 2500
318 #define RTE_ETH_SPEED_NUM_5G 5000
319 #define RTE_ETH_SPEED_NUM_10G 10000
320 #define RTE_ETH_SPEED_NUM_20G 20000
321 #define RTE_ETH_SPEED_NUM_25G 25000
322 #define RTE_ETH_SPEED_NUM_40G 40000
323 #define RTE_ETH_SPEED_NUM_50G 50000
324 #define RTE_ETH_SPEED_NUM_56G 56000
325 #define RTE_ETH_SPEED_NUM_100G 100000
326 #define RTE_ETH_SPEED_NUM_200G 200000
327 #define RTE_ETH_SPEED_NUM_400G 400000
328 #define RTE_ETH_SPEED_NUM_UNKNOWN UINT32_MAX
345 #define RTE_ETH_LINK_HALF_DUPLEX 0
346 #define RTE_ETH_LINK_FULL_DUPLEX 1
347 #define RTE_ETH_LINK_DOWN 0
348 #define RTE_ETH_LINK_UP 1
349 #define RTE_ETH_LINK_FIXED 0
350 #define RTE_ETH_LINK_AUTONEG 1
351 #define RTE_ETH_LINK_MAX_STR_LEN 40
358 struct rte_eth_thresh {
367 #define RTE_ETH_MQ_RX_RSS_FLAG RTE_BIT32(0)
368 #define RTE_ETH_MQ_RX_DCB_FLAG RTE_BIT32(1)
369 #define RTE_ETH_MQ_RX_VMDQ_FLAG RTE_BIT32(2)
376 enum rte_eth_rx_mq_mode {
434 RTE_ETH_VLAN_TYPE_UNKNOWN = 0,
437 RTE_ETH_VLAN_TYPE_MAX,
479 #define RTE_ETH_FLOW_UNKNOWN 0
480 #define RTE_ETH_FLOW_RAW 1
481 #define RTE_ETH_FLOW_IPV4 2
482 #define RTE_ETH_FLOW_FRAG_IPV4 3
483 #define RTE_ETH_FLOW_NONFRAG_IPV4_TCP 4
484 #define RTE_ETH_FLOW_NONFRAG_IPV4_UDP 5
485 #define RTE_ETH_FLOW_NONFRAG_IPV4_SCTP 6
486 #define RTE_ETH_FLOW_NONFRAG_IPV4_OTHER 7
487 #define RTE_ETH_FLOW_IPV6 8
488 #define RTE_ETH_FLOW_FRAG_IPV6 9
489 #define RTE_ETH_FLOW_NONFRAG_IPV6_TCP 10
490 #define RTE_ETH_FLOW_NONFRAG_IPV6_UDP 11
491 #define RTE_ETH_FLOW_NONFRAG_IPV6_SCTP 12
492 #define RTE_ETH_FLOW_NONFRAG_IPV6_OTHER 13
493 #define RTE_ETH_FLOW_L2_PAYLOAD 14
494 #define RTE_ETH_FLOW_IPV6_EX 15
495 #define RTE_ETH_FLOW_IPV6_TCP_EX 16
496 #define RTE_ETH_FLOW_IPV6_UDP_EX 17
498 #define RTE_ETH_FLOW_PORT 18
499 #define RTE_ETH_FLOW_VXLAN 19
500 #define RTE_ETH_FLOW_GENEVE 20
501 #define RTE_ETH_FLOW_NVGRE 21
502 #define RTE_ETH_FLOW_VXLAN_GPE 22
503 #define RTE_ETH_FLOW_GTPU 23
504 #define RTE_ETH_FLOW_MAX 24
510 #define RTE_ETH_RSS_IPV4 RTE_BIT64(2)
511 #define RTE_ETH_RSS_FRAG_IPV4 RTE_BIT64(3)
512 #define RTE_ETH_RSS_NONFRAG_IPV4_TCP RTE_BIT64(4)
513 #define RTE_ETH_RSS_NONFRAG_IPV4_UDP RTE_BIT64(5)
514 #define RTE_ETH_RSS_NONFRAG_IPV4_SCTP RTE_BIT64(6)
515 #define RTE_ETH_RSS_NONFRAG_IPV4_OTHER RTE_BIT64(7)
516 #define RTE_ETH_RSS_IPV6 RTE_BIT64(8)
517 #define RTE_ETH_RSS_FRAG_IPV6 RTE_BIT64(9)
518 #define RTE_ETH_RSS_NONFRAG_IPV6_TCP RTE_BIT64(10)
519 #define RTE_ETH_RSS_NONFRAG_IPV6_UDP RTE_BIT64(11)
520 #define RTE_ETH_RSS_NONFRAG_IPV6_SCTP RTE_BIT64(12)
521 #define RTE_ETH_RSS_NONFRAG_IPV6_OTHER RTE_BIT64(13)
522 #define RTE_ETH_RSS_L2_PAYLOAD RTE_BIT64(14)
523 #define RTE_ETH_RSS_IPV6_EX RTE_BIT64(15)
524 #define RTE_ETH_RSS_IPV6_TCP_EX RTE_BIT64(16)
525 #define RTE_ETH_RSS_IPV6_UDP_EX RTE_BIT64(17)
526 #define RTE_ETH_RSS_PORT RTE_BIT64(18)
527 #define RTE_ETH_RSS_VXLAN RTE_BIT64(19)
528 #define RTE_ETH_RSS_GENEVE RTE_BIT64(20)
529 #define RTE_ETH_RSS_NVGRE RTE_BIT64(21)
530 #define RTE_ETH_RSS_GTPU RTE_BIT64(23)
531 #define RTE_ETH_RSS_ETH RTE_BIT64(24)
532 #define RTE_ETH_RSS_S_VLAN RTE_BIT64(25)
533 #define RTE_ETH_RSS_C_VLAN RTE_BIT64(26)
534 #define RTE_ETH_RSS_ESP RTE_BIT64(27)
535 #define RTE_ETH_RSS_AH RTE_BIT64(28)
536 #define RTE_ETH_RSS_L2TPV3 RTE_BIT64(29)
537 #define RTE_ETH_RSS_PFCP RTE_BIT64(30)
538 #define RTE_ETH_RSS_PPPOE RTE_BIT64(31)
539 #define RTE_ETH_RSS_ECPRI RTE_BIT64(32)
540 #define RTE_ETH_RSS_MPLS RTE_BIT64(33)
541 #define RTE_ETH_RSS_IPV4_CHKSUM RTE_BIT64(34)
555 #define RTE_ETH_RSS_L4_CHKSUM RTE_BIT64(35)
557 #define RTE_ETH_RSS_L2TPV2 RTE_BIT64(36)
568 #define RTE_ETH_RSS_L3_SRC_ONLY RTE_BIT64(63)
569 #define RTE_ETH_RSS_L3_DST_ONLY RTE_BIT64(62)
570 #define RTE_ETH_RSS_L4_SRC_ONLY RTE_BIT64(61)
571 #define RTE_ETH_RSS_L4_DST_ONLY RTE_BIT64(60)
572 #define RTE_ETH_RSS_L2_SRC_ONLY RTE_BIT64(59)
573 #define RTE_ETH_RSS_L2_DST_ONLY RTE_BIT64(58)
581 #define RTE_ETH_RSS_L3_PRE32 RTE_BIT64(57)
582 #define RTE_ETH_RSS_L3_PRE40 RTE_BIT64(56)
583 #define RTE_ETH_RSS_L3_PRE48 RTE_BIT64(55)
584 #define RTE_ETH_RSS_L3_PRE56 RTE_BIT64(54)
585 #define RTE_ETH_RSS_L3_PRE64 RTE_BIT64(53)
586 #define RTE_ETH_RSS_L3_PRE96 RTE_BIT64(52)
601 #define RTE_ETH_RSS_LEVEL_PMD_DEFAULT (UINT64_C(0) << 50)
607 #define RTE_ETH_RSS_LEVEL_OUTERMOST (UINT64_C(1) << 50)
613 #define RTE_ETH_RSS_LEVEL_INNERMOST (UINT64_C(2) << 50)
614 #define RTE_ETH_RSS_LEVEL_MASK (UINT64_C(3) << 50)
616 #define RTE_ETH_RSS_LEVEL(rss_hf) ((rss_hf & RTE_ETH_RSS_LEVEL_MASK) >> 50)
628 static inline uint64_t
631 if ((rss_hf & RTE_ETH_RSS_L3_SRC_ONLY) && (rss_hf & RTE_ETH_RSS_L3_DST_ONLY))
632 rss_hf &= ~(RTE_ETH_RSS_L3_SRC_ONLY | RTE_ETH_RSS_L3_DST_ONLY);
634 if ((rss_hf & RTE_ETH_RSS_L4_SRC_ONLY) && (rss_hf & RTE_ETH_RSS_L4_DST_ONLY))
635 rss_hf &= ~(RTE_ETH_RSS_L4_SRC_ONLY | RTE_ETH_RSS_L4_DST_ONLY);
640 #define RTE_ETH_RSS_IPV6_PRE32 ( \
642 RTE_ETH_RSS_L3_PRE32)
644 #define RTE_ETH_RSS_IPV6_PRE40 ( \
646 RTE_ETH_RSS_L3_PRE40)
648 #define RTE_ETH_RSS_IPV6_PRE48 ( \
650 RTE_ETH_RSS_L3_PRE48)
652 #define RTE_ETH_RSS_IPV6_PRE56 ( \
654 RTE_ETH_RSS_L3_PRE56)
656 #define RTE_ETH_RSS_IPV6_PRE64 ( \
658 RTE_ETH_RSS_L3_PRE64)
660 #define RTE_ETH_RSS_IPV6_PRE96 ( \
662 RTE_ETH_RSS_L3_PRE96)
664 #define RTE_ETH_RSS_IPV6_PRE32_UDP ( \
665 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
666 RTE_ETH_RSS_L3_PRE32)
668 #define RTE_ETH_RSS_IPV6_PRE40_UDP ( \
669 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
670 RTE_ETH_RSS_L3_PRE40)
672 #define RTE_ETH_RSS_IPV6_PRE48_UDP ( \
673 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
674 RTE_ETH_RSS_L3_PRE48)
676 #define RTE_ETH_RSS_IPV6_PRE56_UDP ( \
677 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
678 RTE_ETH_RSS_L3_PRE56)
680 #define RTE_ETH_RSS_IPV6_PRE64_UDP ( \
681 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
682 RTE_ETH_RSS_L3_PRE64)
684 #define RTE_ETH_RSS_IPV6_PRE96_UDP ( \
685 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
686 RTE_ETH_RSS_L3_PRE96)
688 #define RTE_ETH_RSS_IPV6_PRE32_TCP ( \
689 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
690 RTE_ETH_RSS_L3_PRE32)
692 #define RTE_ETH_RSS_IPV6_PRE40_TCP ( \
693 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
694 RTE_ETH_RSS_L3_PRE40)
696 #define RTE_ETH_RSS_IPV6_PRE48_TCP ( \
697 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
698 RTE_ETH_RSS_L3_PRE48)
700 #define RTE_ETH_RSS_IPV6_PRE56_TCP ( \
701 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
702 RTE_ETH_RSS_L3_PRE56)
704 #define RTE_ETH_RSS_IPV6_PRE64_TCP ( \
705 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
706 RTE_ETH_RSS_L3_PRE64)
708 #define RTE_ETH_RSS_IPV6_PRE96_TCP ( \
709 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
710 RTE_ETH_RSS_L3_PRE96)
712 #define RTE_ETH_RSS_IPV6_PRE32_SCTP ( \
713 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
714 RTE_ETH_RSS_L3_PRE32)
716 #define RTE_ETH_RSS_IPV6_PRE40_SCTP ( \
717 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
718 RTE_ETH_RSS_L3_PRE40)
720 #define RTE_ETH_RSS_IPV6_PRE48_SCTP ( \
721 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
722 RTE_ETH_RSS_L3_PRE48)
724 #define RTE_ETH_RSS_IPV6_PRE56_SCTP ( \
725 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
726 RTE_ETH_RSS_L3_PRE56)
728 #define RTE_ETH_RSS_IPV6_PRE64_SCTP ( \
729 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
730 RTE_ETH_RSS_L3_PRE64)
732 #define RTE_ETH_RSS_IPV6_PRE96_SCTP ( \
733 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
734 RTE_ETH_RSS_L3_PRE96)
736 #define RTE_ETH_RSS_IP ( \
738 RTE_ETH_RSS_FRAG_IPV4 | \
739 RTE_ETH_RSS_NONFRAG_IPV4_OTHER | \
741 RTE_ETH_RSS_FRAG_IPV6 | \
742 RTE_ETH_RSS_NONFRAG_IPV6_OTHER | \
745 #define RTE_ETH_RSS_UDP ( \
746 RTE_ETH_RSS_NONFRAG_IPV4_UDP | \
747 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
748 RTE_ETH_RSS_IPV6_UDP_EX)
750 #define RTE_ETH_RSS_TCP ( \
751 RTE_ETH_RSS_NONFRAG_IPV4_TCP | \
752 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
753 RTE_ETH_RSS_IPV6_TCP_EX)
755 #define RTE_ETH_RSS_SCTP ( \
756 RTE_ETH_RSS_NONFRAG_IPV4_SCTP | \
757 RTE_ETH_RSS_NONFRAG_IPV6_SCTP)
759 #define RTE_ETH_RSS_TUNNEL ( \
760 RTE_ETH_RSS_VXLAN | \
761 RTE_ETH_RSS_GENEVE | \
764 #define RTE_ETH_RSS_VLAN ( \
765 RTE_ETH_RSS_S_VLAN | \
769 #define RTE_ETH_RSS_PROTO_MASK ( \
771 RTE_ETH_RSS_FRAG_IPV4 | \
772 RTE_ETH_RSS_NONFRAG_IPV4_TCP | \
773 RTE_ETH_RSS_NONFRAG_IPV4_UDP | \
774 RTE_ETH_RSS_NONFRAG_IPV4_SCTP | \
775 RTE_ETH_RSS_NONFRAG_IPV4_OTHER | \
777 RTE_ETH_RSS_FRAG_IPV6 | \
778 RTE_ETH_RSS_NONFRAG_IPV6_TCP | \
779 RTE_ETH_RSS_NONFRAG_IPV6_UDP | \
780 RTE_ETH_RSS_NONFRAG_IPV6_SCTP | \
781 RTE_ETH_RSS_NONFRAG_IPV6_OTHER | \
782 RTE_ETH_RSS_L2_PAYLOAD | \
783 RTE_ETH_RSS_IPV6_EX | \
784 RTE_ETH_RSS_IPV6_TCP_EX | \
785 RTE_ETH_RSS_IPV6_UDP_EX | \
787 RTE_ETH_RSS_VXLAN | \
788 RTE_ETH_RSS_GENEVE | \
789 RTE_ETH_RSS_NVGRE | \
797 #define RTE_ETH_RSS_RETA_SIZE_64 64
798 #define RTE_ETH_RSS_RETA_SIZE_128 128
799 #define RTE_ETH_RSS_RETA_SIZE_256 256
800 #define RTE_ETH_RSS_RETA_SIZE_512 512
801 #define RTE_ETH_RETA_GROUP_SIZE 64
804 #define RTE_ETH_VMDQ_MAX_VLAN_FILTERS 64
805 #define RTE_ETH_DCB_NUM_USER_PRIORITIES 8
806 #define RTE_ETH_VMDQ_DCB_NUM_QUEUES 128
807 #define RTE_ETH_DCB_NUM_QUEUES 128
811 #define RTE_ETH_DCB_PG_SUPPORT RTE_BIT32(0)
812 #define RTE_ETH_DCB_PFC_SUPPORT RTE_BIT32(1)
816 #define RTE_ETH_VLAN_STRIP_OFFLOAD 0x0001
817 #define RTE_ETH_VLAN_FILTER_OFFLOAD 0x0002
818 #define RTE_ETH_VLAN_EXTEND_OFFLOAD 0x0004
819 #define RTE_ETH_QINQ_STRIP_OFFLOAD 0x0008
821 #define RTE_ETH_VLAN_STRIP_MASK 0x0001
822 #define RTE_ETH_VLAN_FILTER_MASK 0x0002
823 #define RTE_ETH_VLAN_EXTEND_MASK 0x0004
824 #define RTE_ETH_QINQ_STRIP_MASK 0x0008
825 #define RTE_ETH_VLAN_ID_MAX 0x0FFF
829 #define RTE_ETH_NUM_RECEIVE_MAC_ADDR 128
832 #define RTE_ETH_VMDQ_NUM_UC_HASH_ARRAY 128
838 #define RTE_ETH_VMDQ_ACCEPT_UNTAG RTE_BIT32(0)
840 #define RTE_ETH_VMDQ_ACCEPT_HASH_MC RTE_BIT32(1)
842 #define RTE_ETH_VMDQ_ACCEPT_HASH_UC RTE_BIT32(2)
844 #define RTE_ETH_VMDQ_ACCEPT_BROADCAST RTE_BIT32(3)
846 #define RTE_ETH_VMDQ_ACCEPT_MULTICAST RTE_BIT32(4)
859 uint16_t
reta[RTE_ETH_RETA_GROUP_SIZE];
883 struct rte_eth_dcb_rx_conf {
889 struct rte_eth_vmdq_dcb_tx_conf {
895 struct rte_eth_dcb_tx_conf {
901 struct rte_eth_vmdq_tx_conf {
1127 uint16_t rx_nmempool;
1194 #define RTE_ETH_MAX_HAIRPIN_PEERS 32
1408 RTE_ETH_TUNNEL_TYPE_NONE = 0,
1409 RTE_ETH_TUNNEL_TYPE_VXLAN,
1410 RTE_ETH_TUNNEL_TYPE_GENEVE,
1411 RTE_ETH_TUNNEL_TYPE_TEREDO,
1412 RTE_ETH_TUNNEL_TYPE_NVGRE,
1413 RTE_ETH_TUNNEL_TYPE_IP_IN_GRE,
1414 RTE_ETH_L2_TUNNEL_TYPE_E_TAG,
1415 RTE_ETH_TUNNEL_TYPE_VXLAN_GPE,
1416 RTE_ETH_TUNNEL_TYPE_ECPRI,
1417 RTE_ETH_TUNNEL_TYPE_MAX,
1449 #define rte_intr_conf rte_eth_intr_conf
1497 #define RTE_ETH_RX_OFFLOAD_VLAN_STRIP RTE_BIT64(0)
1498 #define RTE_ETH_RX_OFFLOAD_IPV4_CKSUM RTE_BIT64(1)
1499 #define RTE_ETH_RX_OFFLOAD_UDP_CKSUM RTE_BIT64(2)
1500 #define RTE_ETH_RX_OFFLOAD_TCP_CKSUM RTE_BIT64(3)
1501 #define RTE_ETH_RX_OFFLOAD_TCP_LRO RTE_BIT64(4)
1502 #define RTE_ETH_RX_OFFLOAD_QINQ_STRIP RTE_BIT64(5)
1503 #define RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM RTE_BIT64(6)
1504 #define RTE_ETH_RX_OFFLOAD_MACSEC_STRIP RTE_BIT64(7)
1505 #define RTE_ETH_RX_OFFLOAD_VLAN_FILTER RTE_BIT64(9)
1506 #define RTE_ETH_RX_OFFLOAD_VLAN_EXTEND RTE_BIT64(10)
1507 #define RTE_ETH_RX_OFFLOAD_SCATTER RTE_BIT64(13)
1513 #define RTE_ETH_RX_OFFLOAD_TIMESTAMP RTE_BIT64(14)
1514 #define RTE_ETH_RX_OFFLOAD_SECURITY RTE_BIT64(15)
1515 #define RTE_ETH_RX_OFFLOAD_KEEP_CRC RTE_BIT64(16)
1516 #define RTE_ETH_RX_OFFLOAD_SCTP_CKSUM RTE_BIT64(17)
1517 #define RTE_ETH_RX_OFFLOAD_OUTER_UDP_CKSUM RTE_BIT64(18)
1518 #define RTE_ETH_RX_OFFLOAD_RSS_HASH RTE_BIT64(19)
1519 #define RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT RTE_BIT64(20)
1521 #define RTE_ETH_RX_OFFLOAD_CHECKSUM (RTE_ETH_RX_OFFLOAD_IPV4_CKSUM | \
1522 RTE_ETH_RX_OFFLOAD_UDP_CKSUM | \
1523 RTE_ETH_RX_OFFLOAD_TCP_CKSUM)
1524 #define RTE_ETH_RX_OFFLOAD_VLAN (RTE_ETH_RX_OFFLOAD_VLAN_STRIP | \
1525 RTE_ETH_RX_OFFLOAD_VLAN_FILTER | \
1526 RTE_ETH_RX_OFFLOAD_VLAN_EXTEND | \
1527 RTE_ETH_RX_OFFLOAD_QINQ_STRIP)
1537 #define RTE_ETH_TX_OFFLOAD_VLAN_INSERT RTE_BIT64(0)
1538 #define RTE_ETH_TX_OFFLOAD_IPV4_CKSUM RTE_BIT64(1)
1539 #define RTE_ETH_TX_OFFLOAD_UDP_CKSUM RTE_BIT64(2)
1540 #define RTE_ETH_TX_OFFLOAD_TCP_CKSUM RTE_BIT64(3)
1541 #define RTE_ETH_TX_OFFLOAD_SCTP_CKSUM RTE_BIT64(4)
1542 #define RTE_ETH_TX_OFFLOAD_TCP_TSO RTE_BIT64(5)
1543 #define RTE_ETH_TX_OFFLOAD_UDP_TSO RTE_BIT64(6)
1544 #define RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM RTE_BIT64(7)
1545 #define RTE_ETH_TX_OFFLOAD_QINQ_INSERT RTE_BIT64(8)
1546 #define RTE_ETH_TX_OFFLOAD_VXLAN_TNL_TSO RTE_BIT64(9)
1547 #define RTE_ETH_TX_OFFLOAD_GRE_TNL_TSO RTE_BIT64(10)
1548 #define RTE_ETH_TX_OFFLOAD_IPIP_TNL_TSO RTE_BIT64(11)
1549 #define RTE_ETH_TX_OFFLOAD_GENEVE_TNL_TSO RTE_BIT64(12)
1550 #define RTE_ETH_TX_OFFLOAD_MACSEC_INSERT RTE_BIT64(13)
1555 #define RTE_ETH_TX_OFFLOAD_MT_LOCKFREE RTE_BIT64(14)
1557 #define RTE_ETH_TX_OFFLOAD_MULTI_SEGS RTE_BIT64(15)
1563 #define RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE RTE_BIT64(16)
1564 #define RTE_ETH_TX_OFFLOAD_SECURITY RTE_BIT64(17)
1570 #define RTE_ETH_TX_OFFLOAD_UDP_TNL_TSO RTE_BIT64(18)
1576 #define RTE_ETH_TX_OFFLOAD_IP_TNL_TSO RTE_BIT64(19)
1578 #define RTE_ETH_TX_OFFLOAD_OUTER_UDP_CKSUM RTE_BIT64(20)
1584 #define RTE_ETH_TX_OFFLOAD_SEND_ON_TIMESTAMP RTE_BIT64(21)
1594 #define RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP RTE_BIT64(0)
1596 #define RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP RTE_BIT64(1)
1606 #define RTE_ETH_DEV_CAPA_RXQ_SHARE RTE_BIT64(2)
1608 #define RTE_ETH_DEV_CAPA_FLOW_RULE_KEEP RTE_BIT64(3)
1610 #define RTE_ETH_DEV_CAPA_FLOW_SHARED_OBJECT_KEEP RTE_BIT64(4)
1618 #define RTE_ETH_DEV_FALLBACK_RX_RINGSIZE 512
1619 #define RTE_ETH_DEV_FALLBACK_TX_RINGSIZE 512
1620 #define RTE_ETH_DEV_FALLBACK_RX_NBQUEUES 1
1621 #define RTE_ETH_DEV_FALLBACK_TX_NBQUEUES 1
1638 #define RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID (UINT16_MAX)
1788 #define RTE_ETH_QUEUE_STATE_STOPPED 0
1789 #define RTE_ETH_QUEUE_STATE_STARTED 1
1790 #define RTE_ETH_QUEUE_STATE_HAIRPIN 2
1797 struct rte_eth_rxq_info {
1830 #define RTE_ETH_BURST_FLAG_PER_QUEUE RTE_BIT64(0)
1839 #define RTE_ETH_BURST_MODE_INFO_SIZE 1024
1840 char info[RTE_ETH_BURST_MODE_INFO_SIZE];
1844 #define RTE_ETH_XSTATS_NAME_SIZE 64
1878 #define RTE_ETH_DCB_NUM_TCS 8
1879 #define RTE_ETH_MAX_VMDQ_POOL 64
1890 } tc_rxq[RTE_ETH_MAX_VMDQ_POOL][RTE_ETH_DCB_NUM_TCS];
1895 } tc_txq[RTE_ETH_MAX_VMDQ_POOL][RTE_ETH_DCB_NUM_TCS];
1905 uint8_t tc_bws[RTE_ETH_DCB_NUM_TCS];
1922 #define RTE_ETH_FEC_MODE_TO_CAPA(x) RTE_BIT32(x)
1925 #define RTE_ETH_FEC_MODE_CAPA_MASK(x) RTE_BIT32(RTE_ETH_FEC_ ## x)
1928 struct rte_eth_fec_capa {
1933 #define RTE_ETH_ALL RTE_MAX_ETHPORTS
1936 #define RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, retval) do { \
1937 if (!rte_eth_dev_is_valid_port(port_id)) { \
1938 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%u\n", port_id); \
1943 #define RTE_ETH_VALID_PORTID_OR_RET(port_id) do { \
1944 if (!rte_eth_dev_is_valid_port(port_id)) { \
1945 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%u\n", port_id); \
1973 struct rte_mbuf *pkts[], uint16_t nb_pkts, uint16_t max_pkts,
1997 struct rte_mbuf *pkts[], uint16_t nb_pkts,
void *user_param);
2011 struct rte_eth_dev_sriov {
2013 uint8_t nb_q_per_pool;
2014 uint16_t def_vmdq_idx;
2015 uint16_t def_pool_q_idx;
2017 #define RTE_ETH_DEV_SRIOV(dev) ((dev)->data->sriov)
2019 #define RTE_ETH_NAME_MAX_LEN RTE_DEV_NAME_MAX_LEN
2021 #define RTE_ETH_DEV_NO_OWNER 0
2023 #define RTE_ETH_MAX_OWNER_NAME_LEN 64
2025 struct rte_eth_dev_owner {
2027 char name[RTE_ETH_MAX_OWNER_NAME_LEN];
2035 #define RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE RTE_BIT32(0)
2037 #define RTE_ETH_DEV_INTR_LSC RTE_BIT32(1)
2039 #define RTE_ETH_DEV_BONDED_SLAVE RTE_BIT32(2)
2041 #define RTE_ETH_DEV_INTR_RMV RTE_BIT32(3)
2043 #define RTE_ETH_DEV_REPRESENTOR RTE_BIT32(4)
2045 #define RTE_ETH_DEV_NOLIVE_MAC_ADDR RTE_BIT32(5)
2050 #define RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS RTE_BIT32(6)
2065 const uint64_t owner_id);
2070 #define RTE_ETH_FOREACH_DEV_OWNED_BY(p, o) \
2071 for (p = rte_eth_find_next_owned_by(0, o); \
2072 (unsigned int)p < (unsigned int)RTE_MAX_ETHPORTS; \
2073 p = rte_eth_find_next_owned_by(p + 1, o))
2088 #define RTE_ETH_FOREACH_DEV(p) \
2089 RTE_ETH_FOREACH_DEV_OWNED_BY(p, RTE_ETH_DEV_NO_OWNER)
2104 const struct rte_device *parent);
2114 #define RTE_ETH_FOREACH_DEV_OF(port_id, parent) \
2115 for (port_id = rte_eth_find_next_of(0, parent); \
2116 port_id < RTE_MAX_ETHPORTS; \
2117 port_id = rte_eth_find_next_of(port_id + 1, parent))
2143 #define RTE_ETH_FOREACH_DEV_SIBLING(port_id, ref_port_id) \
2144 for (port_id = rte_eth_find_next_sibling(0, ref_port_id); \
2145 port_id < RTE_MAX_ETHPORTS; \
2146 port_id = rte_eth_find_next_sibling(port_id + 1, ref_port_id))
2171 const struct rte_eth_dev_owner *owner);
2184 const uint64_t owner_id);
2207 struct rte_eth_dev_owner *owner);
2318 uint16_t nb_tx_queue,
const struct rte_eth_conf *eth_conf);
2394 uint16_t nb_rx_desc,
unsigned int socket_id,
2427 (uint16_t port_id, uint16_t rx_queue_id, uint16_t nb_rx_desc,
2479 uint16_t nb_tx_desc,
unsigned int socket_id,
2509 (uint16_t port_id, uint16_t tx_queue_id, uint16_t nb_tx_desc,
2540 size_t len, uint32_t direction);
3157 uint64_t *values,
unsigned int size);
3214 uint16_t tx_queue_id, uint8_t stat_idx);
3235 uint16_t rx_queue_id,
3337 char *fw_version,
size_t fw_size);
3379 uint32_t *ptypes,
int num);
3411 uint32_t *set_ptypes,
unsigned int num);
3585 uint8_t avail_thresh);
3615 uint8_t *avail_thresh);
3617 typedef void (*buffer_tx_error_fn)(
struct rte_mbuf **unsent, uint16_t count,
3625 buffer_tx_error_fn error_callback;
3626 void *error_userdata;
3639 #define RTE_ETH_TX_BUFFER_SIZE(sz) \
3640 (sizeof(struct rte_eth_dev_tx_buffer) + (sz) * sizeof(struct rte_mbuf *))
3681 buffer_tx_error_fn callback,
void *userdata);
4113 int epfd,
int op,
void *data);
4192 struct rte_eth_fec_capa *speed_fec_capa,
4417 uint16_t reta_size);
4439 uint16_t reta_size);
4606 struct rte_eth_rxtx_callback;
4633 const struct rte_eth_rxtx_callback *
4663 const struct rte_eth_rxtx_callback *
4692 const struct rte_eth_rxtx_callback *
4730 const struct rte_eth_rxtx_callback *user_cb);
4766 const struct rte_eth_rxtx_callback *user_cb);
4876 struct rte_power_monitor_cond *pmc);
4993 struct rte_dev_eeprom_info *
info);
5016 uint32_t nb_mc_addr);
5065 struct timespec *timestamp, uint32_t flags);
5083 struct timespec *timestamp);
5243 uint16_t *nb_rx_desc,
5244 uint16_t *nb_tx_desc);
5311 char name[RTE_DEV_NAME_MAX_LEN];
5356 #define RTE_ETH_RX_METADATA_USER_FLAG RTE_BIT64(0)
5359 #define RTE_ETH_RX_METADATA_USER_MARK RTE_BIT64(1)
5362 #define RTE_ETH_RX_METADATA_TUNNEL_ID RTE_BIT64(2)
5406 #define RTE_ETH_DEV_REASSEMBLY_F_IPV4 (RTE_BIT32(0))
5408 #define RTE_ETH_DEV_REASSEMBLY_F_IPV6 (RTE_BIT32(1))
5577 uint16_t offset, uint16_t num, FILE *file);
5604 uint16_t offset, uint16_t num, FILE *file);
5669 uint8_t rsvd_obj_params[4];
5684 uint8_t rsvd_mode_params[4];
5795 uint16_t rte_eth_call_rx_callbacks(uint16_t port_id, uint16_t queue_id,
5796 struct rte_mbuf **rx_pkts, uint16_t nb_rx, uint16_t nb_pkts,
5886 static inline uint16_t
5888 struct rte_mbuf **rx_pkts,
const uint16_t nb_pkts)
5891 struct rte_eth_fp_ops *p;
5894 #ifdef RTE_ETHDEV_DEBUG_RX
5895 if (port_id >= RTE_MAX_ETHPORTS ||
5896 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
5898 "Invalid port_id=%u or queue_id=%u\n",
5905 p = &rte_eth_fp_ops[port_id];
5906 qd = p->rxq.data[queue_id];
5908 #ifdef RTE_ETHDEV_DEBUG_RX
5909 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
5912 RTE_ETHDEV_LOG(ERR,
"Invalid Rx queue_id=%u for port_id=%u\n",
5918 nb_rx = p->rx_pkt_burst(qd, rx_pkts, nb_pkts);
5920 #ifdef RTE_ETHDEV_RXTX_CALLBACKS
5930 cb = __atomic_load_n((
void **)&p->rxq.clbk[queue_id],
5933 nb_rx = rte_eth_call_rx_callbacks(port_id, queue_id,
5934 rx_pkts, nb_rx, nb_pkts, cb);
5938 rte_ethdev_trace_rx_burst(port_id, queue_id, (
void **)rx_pkts, nb_rx);
5962 struct rte_eth_fp_ops *p;
5965 #ifdef RTE_ETHDEV_DEBUG_RX
5966 if (port_id >= RTE_MAX_ETHPORTS ||
5967 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
5969 "Invalid port_id=%u or queue_id=%u\n",
5976 p = &rte_eth_fp_ops[port_id];
5977 qd = p->rxq.data[queue_id];
5979 #ifdef RTE_ETHDEV_DEBUG_RX
5980 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5985 if (*p->rx_queue_count == NULL)
5987 return (
int)(*p->rx_queue_count)(qd);
5993 #define RTE_ETH_RX_DESC_AVAIL 0
5994 #define RTE_ETH_RX_DESC_DONE 1
5995 #define RTE_ETH_RX_DESC_UNAVAIL 2
6035 struct rte_eth_fp_ops *p;
6038 #ifdef RTE_ETHDEV_DEBUG_RX
6039 if (port_id >= RTE_MAX_ETHPORTS ||
6040 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6042 "Invalid port_id=%u or queue_id=%u\n",
6049 p = &rte_eth_fp_ops[port_id];
6050 qd = p->rxq.data[queue_id];
6052 #ifdef RTE_ETHDEV_DEBUG_RX
6053 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
6057 if (*p->rx_descriptor_status == NULL)
6059 return (*p->rx_descriptor_status)(qd, offset);
6065 #define RTE_ETH_TX_DESC_FULL 0
6066 #define RTE_ETH_TX_DESC_DONE 1
6067 #define RTE_ETH_TX_DESC_UNAVAIL 2
6103 static inline int rte_eth_tx_descriptor_status(uint16_t port_id,
6104 uint16_t queue_id, uint16_t offset)
6106 struct rte_eth_fp_ops *p;
6109 #ifdef RTE_ETHDEV_DEBUG_TX
6110 if (port_id >= RTE_MAX_ETHPORTS ||
6111 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6113 "Invalid port_id=%u or queue_id=%u\n",
6120 p = &rte_eth_fp_ops[port_id];
6121 qd = p->txq.data[queue_id];
6123 #ifdef RTE_ETHDEV_DEBUG_TX
6124 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
6128 if (*p->tx_descriptor_status == NULL)
6130 return (*p->tx_descriptor_status)(qd, offset);
6152 uint16_t rte_eth_call_tx_callbacks(uint16_t port_id, uint16_t queue_id,
6153 struct rte_mbuf **tx_pkts, uint16_t nb_pkts,
void *opaque);
6226 static inline uint16_t
6228 struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
6230 struct rte_eth_fp_ops *p;
6233 #ifdef RTE_ETHDEV_DEBUG_TX
6234 if (port_id >= RTE_MAX_ETHPORTS ||
6235 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6237 "Invalid port_id=%u or queue_id=%u\n",
6244 p = &rte_eth_fp_ops[port_id];
6245 qd = p->txq.data[queue_id];
6247 #ifdef RTE_ETHDEV_DEBUG_TX
6248 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
6251 RTE_ETHDEV_LOG(ERR,
"Invalid Tx queue_id=%u for port_id=%u\n",
6257 #ifdef RTE_ETHDEV_RXTX_CALLBACKS
6267 cb = __atomic_load_n((
void **)&p->txq.clbk[queue_id],
6270 nb_pkts = rte_eth_call_tx_callbacks(port_id, queue_id,
6271 tx_pkts, nb_pkts, cb);
6275 nb_pkts = p->tx_pkt_burst(qd, tx_pkts, nb_pkts);
6277 rte_ethdev_trace_tx_burst(port_id, queue_id, (
void **)tx_pkts, nb_pkts);
6335 #ifndef RTE_ETHDEV_TX_PREPARE_NOOP
6337 static inline uint16_t
6339 struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
6341 struct rte_eth_fp_ops *p;
6344 #ifdef RTE_ETHDEV_DEBUG_TX
6345 if (port_id >= RTE_MAX_ETHPORTS ||
6346 queue_id >= RTE_MAX_QUEUES_PER_PORT) {
6348 "Invalid port_id=%u or queue_id=%u\n",
6356 p = &rte_eth_fp_ops[port_id];
6357 qd = p->txq.data[queue_id];
6359 #ifdef RTE_ETHDEV_DEBUG_TX
6361 RTE_ETHDEV_LOG(ERR,
"Invalid Tx port_id=%u\n", port_id);
6366 RTE_ETHDEV_LOG(ERR,
"Invalid Tx queue_id=%u for port_id=%u\n",
6373 if (!p->tx_pkt_prepare)
6376 return p->tx_pkt_prepare(qd, tx_pkts, nb_pkts);
6390 static inline uint16_t
6422 static inline uint16_t
6427 uint16_t to_send = buffer->
length;
6438 buffer->error_callback(&buffer->
pkts[sent],
6439 (uint16_t)(to_send - sent),
6440 buffer->error_userdata);
int rte_eth_dev_stop(uint16_t port_id)
struct rte_eth_vmdq_dcb_tx_conf vmdq_dcb_tx_conf
int rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id, struct rte_eth_pfc_conf *pfc_conf)
int rte_eth_promiscuous_disable(uint16_t port_id)
__extension__ uint32_t multi_pools
int rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_burst_mode *mode)
__rte_experimental int rte_eth_tx_descriptor_dump(uint16_t port_id, uint16_t queue_id, uint16_t offset, uint16_t num, FILE *file)
struct rte_eth_dev_portconf default_rxportconf
#define __rte_always_inline
#define RTE_ETH_DCB_NUM_USER_PRIORITIES
uint16_t rte_eth_dev_count_avail(void)
int rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *time)
rte_eth_event_macsec_type
char info[RTE_ETH_BURST_MODE_INFO_SIZE]
const uint32_t * dev_flags
int rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
int rte_eth_timesync_read_time(uint16_t port_id, struct timespec *time)
struct rte_eth_rxseg_capa rx_seg_capa
uint64_t rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
__rte_experimental int rte_eth_dev_priv_dump(uint16_t port_id, FILE *file)
#define __rte_cache_min_aligned
int rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_queue, uint16_t nb_tx_queue, const struct rte_eth_conf *eth_conf)
int rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
static uint16_t rte_eth_tx_prepare(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
struct rte_device * device
struct rte_eth_vmdq_tx_conf vmdq_tx_conf
const struct rte_eth_rxtx_callback * rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id, rte_rx_callback_fn fn, void *user_param)
uint64_t q_errors[RTE_ETHDEV_QUEUE_STAT_CNTRS]
struct rte_eth_thresh rx_thresh
uint16_t rte_eth_find_next(uint16_t port_id)
__rte_experimental int rte_eth_rx_descriptor_dump(uint16_t port_id, uint16_t queue_id, uint16_t offset, uint16_t num, FILE *file)
int rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
int rte_eth_led_off(uint16_t port_id)
int rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id, struct rte_eth_udp_tunnel *tunnel_udp)
static int rte_eth_rx_descriptor_status(uint16_t port_id, uint16_t queue_id, uint16_t offset)
uint32_t locked_device_memory
__rte_experimental int rte_eth_dev_hairpin_capability_get(uint16_t port_id, struct rte_eth_hairpin_cap *cap)
__rte_experimental int rte_eth_dev_map_aggr_tx_affinity(uint16_t port_id, uint16_t tx_queue_id, uint8_t affinity)
int rte_eth_dev_rss_reta_update(uint16_t port_id, struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size)
int rte_eth_dev_rss_hash_update(uint16_t port_id, struct rte_eth_rss_conf *rss_conf)
__rte_experimental int rte_eth_fec_set(uint16_t port_id, uint32_t fec_capa)
uint64_t rx_queue_offload_capa
int rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats, unsigned int n)
__rte_experimental int rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
__rte_experimental int rte_eth_dev_count_aggr_ports(uint16_t port_id)
int rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs)
int rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id, int epfd, int op, void *data)
int rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id, const struct rte_eth_rxtx_callback *user_cb)
enum rte_eth_tx_mq_mode mq_mode
int rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
uint64_t tx_queue_offload_capa
uint8_t enable_default_pool
uint32_t max_hash_mac_addrs
int rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
uint16_t rte_eth_find_next_sibling(uint16_t port_id_start, uint16_t ref_port_id)
uint64_t q_obytes[RTE_ETHDEV_QUEUE_STAT_CNTRS]
int rte_eth_dev_get_eeprom_length(uint16_t port_id)
struct rte_eth_rss_conf rss_conf
int rte_eth_dev_close(uint16_t port_id)
int rte_eth_dev_rx_intr_enable(uint16_t port_id, uint16_t queue_id)
__rte_experimental int rte_eth_rx_avail_thresh_set(uint16_t port_id, uint16_t queue_id, uint8_t avail_thresh)
int rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id, uint8_t stat_idx)
int rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_txq_info *qinfo)
int rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
struct rte_eth_vmdq_rx_conf::@114 pool_map[RTE_ETH_VMDQ_MAX_VLAN_FILTERS]
__rte_experimental int rte_eth_dev_get_module_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
uint32_t dcb_capability_en
uint64_t q_ibytes[RTE_ETHDEV_QUEUE_STAT_CNTRS]
__rte_experimental int rte_eth_dev_conf_get(uint16_t port_id, struct rte_eth_conf *dev_conf)
struct rte_eth_switch_info switch_info
int rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
int rte_eth_dev_callback_unregister(uint16_t port_id, enum rte_eth_event_type event, rte_eth_dev_cb_fn cb_fn, void *cb_arg)
int rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
int rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
int rte_eth_dev_set_link_up(uint16_t port_id)
int rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp, uint32_t flags)
struct rte_eth_thresh tx_thresh
struct rte_eth_desc_lim rx_desc_lim
int rte_eth_dev_get_vlan_offload(uint16_t port_id)
int rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id, uint16_t nb_tx_desc, unsigned int socket_id, const struct rte_eth_txconf *tx_conf)
int rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_burst_mode *mode)
uint8_t rx_deferred_start
int(* rte_eth_dev_cb_fn)(uint16_t port_id, enum rte_eth_event_type event, void *cb_arg, void *ret_param)
struct rte_eth_rxmode rxmode
uint64_t q_ipackets[RTE_ETHDEV_QUEUE_STAT_CNTRS]
enum rte_eth_nb_pools nb_queue_pools
#define RTE_ETH_MQ_RX_RSS_FLAG
struct rte_eth_txconf conf
uint32_t rte_eth_speed_bitflag(uint32_t speed, int duplex)
int rte_eth_dev_owner_set(const uint16_t port_id, const struct rte_eth_dev_owner *owner)
#define RTE_ETH_XSTATS_NAME_SIZE
int rte_eth_dev_rss_hash_conf_get(uint16_t port_id, struct rte_eth_rss_conf *rss_conf)
__rte_experimental int rte_eth_macaddrs_get(uint16_t port_id, struct rte_ether_addr *ma, unsigned int num)
struct rte_eth_desc_lim tx_desc_lim
int rte_eth_timesync_disable(uint16_t port_id)
int rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *mac_addr)
__rte_experimental int rte_eth_rx_avail_thresh_query(uint16_t port_id, uint16_t *queue_id, uint8_t *avail_thresh)
__rte_experimental int rte_eth_representor_info_get(uint16_t port_id, struct rte_eth_representor_info *info)
__rte_experimental int rte_eth_dev_priority_flow_ctrl_queue_configure(uint16_t port_id, struct rte_eth_pfc_queue_conf *pfc_queue_conf)
void rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
void * rte_eth_dev_get_sec_ctx(uint16_t port_id)
__rte_experimental int rte_eth_fec_get_capability(uint16_t port_id, struct rte_eth_fec_capa *speed_fec_capa, unsigned int num)
struct rte_mempool ** rx_mempools
int rte_eth_stats_reset(uint16_t port_id)
int rte_eth_allmulticast_enable(uint16_t port_id)
struct rte_eth_txconf default_txconf
__rte_experimental int rte_eth_get_monitor_addr(uint16_t port_id, uint16_t queue_id, struct rte_power_monitor_cond *pmc)
uint32_t offset_align_log2
int rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask, uint32_t *set_ptypes, unsigned int num)
void rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent, void *userdata)
int rte_eth_dev_udp_tunnel_port_add(uint16_t port_id, struct rte_eth_udp_tunnel *tunnel_udp)
struct rte_eth_dcb_rx_conf dcb_rx_conf
enum rte_eth_err_handle_mode err_handle_mode
struct rte_eth_vmdq_rx_conf vmdq_rx_conf
int rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
__rte_experimental int rte_eth_buffer_split_get_supported_hdr_ptypes(uint16_t port_id, uint32_t *ptypes, int num)
uint16_t rte_eth_find_next_of(uint16_t port_id_start, const struct rte_device *parent)
enum rte_eth_rx_mq_mode mq_mode
int rte_eth_dev_callback_register(uint16_t port_id, enum rte_eth_event_type event, rte_eth_dev_cb_fn cb_fn, void *cb_arg)
enum rte_eth_nb_pools nb_queue_pools
int rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
static uint16_t rte_eth_rx_burst(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **rx_pkts, const uint16_t nb_pkts)
int rte_eth_allmulticast_disable(uint16_t port_id)
__rte_experimental int rte_eth_dev_get_module_info(uint16_t port_id, struct rte_eth_dev_module_info *modinfo)
int rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id, int on)
int rte_eth_dev_start(uint16_t port_id)
__rte_experimental int rte_eth_cman_config_get(uint16_t port_id, struct rte_eth_cman_config *config)
__rte_experimental int rte_eth_ip_reassembly_capability_get(uint16_t port_id, struct rte_eth_ip_reassembly_params *capa)
int rte_eth_dev_reset(uint16_t port_id)
int rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids, uint64_t *values, unsigned int size)
#define RTE_ETH_MQ_RX_DCB_FLAG
struct rte_eth_dcb_tx_conf dcb_tx_conf
enum rte_eth_fc_mode mode_capa
__rte_experimental int rte_eth_ip_reassembly_conf_get(uint16_t port_id, struct rte_eth_ip_reassembly_params *conf)
int rte_eth_dev_rx_intr_disable(uint16_t port_id, uint16_t queue_id)
int rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer, buffer_tx_error_fn callback, void *userdata)
void rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent, void *userdata)
uint64_t q_opackets[RTE_ETHDEV_QUEUE_STAT_CNTRS]
int rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
int rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id, const struct rte_eth_rxtx_callback *user_cb)
int rte_eth_dev_is_removed(uint16_t port_id)
uint16_t(* rte_tx_callback_fn)(uint16_t port_id, uint16_t queue, struct rte_mbuf *pkts[], uint16_t nb_pkts, void *user_param)
int rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
__rte_experimental int rte_eth_link_to_str(char *str, size_t len, const struct rte_eth_link *eth_link)
int rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id, uint16_t *nb_rx_desc, uint16_t *nb_tx_desc)
int rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *mac_addr)
__rte_experimental int rte_eth_dev_priority_flow_ctrl_queue_info_get(uint16_t port_id, struct rte_eth_pfc_queue_info *pfc_queue_info)
int rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
int rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *mac_addr, uint32_t pool)
int rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
struct rte_mbuf * next_frag
int rte_eth_xstats_reset(uint16_t port_id)
#define RTE_ETH_MQ_RX_VMDQ_FLAG
__rte_experimental int rte_eth_hairpin_get_peer_ports(uint16_t port_id, uint16_t *peer_ports, size_t len, uint32_t direction)
union rte_eth_conf::@118 tx_adv_conf
int rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name, uint64_t *id)
int rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
__extension__ uint8_t hw_vlan_insert_pvid
enum rte_eth_fc_mode mode
const struct rte_eth_rxtx_callback * rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id, rte_tx_callback_fn fn, void *user_param)
uint64_t flow_type_rss_offloads
#define RTE_ETH_VMDQ_MAX_VLAN_FILTERS
uint16_t rte_eth_dev_count_total(void)
int rte_eth_promiscuous_enable(uint16_t port_id)
int rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
union rte_eth_rxseg * rx_seg
int rte_eth_dev_owner_new(uint64_t *owner_id)
struct rte_eth_dev_portconf default_txportconf
const char * rte_eth_dev_tx_offload_name(uint64_t offload)
__rte_experimental int rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa)
int rte_eth_link_get(uint16_t port_id, struct rte_eth_link *link)
int rte_eth_dev_owner_delete(const uint64_t owner_id)
rte_eth_event_macsec_subtype
static __rte_always_inline uint16_t rte_eth_tx_buffer(uint16_t port_id, uint16_t queue_id, struct rte_eth_dev_tx_buffer *buffer, struct rte_mbuf *tx_pkt)
__extension__ uint8_t hw_vlan_reject_untagged
int rte_eth_dev_set_mc_addr_list(uint16_t port_id, struct rte_ether_addr *mc_addr_set, uint32_t nb_mc_addr)
uint32_t use_locked_device_memory
int rte_eth_dev_get_dcb_info(uint16_t port_id, struct rte_eth_dcb_info *dcb_info)
rte_eth_event_ipsec_subtype
struct rte_eth_intr_conf intr_conf
int rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id, uint8_t stat_idx)
int rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
__rte_experimental const char * rte_eth_link_speed_to_str(uint32_t link_speed)
static int rte_eth_rx_queue_count(uint16_t port_id, uint16_t queue_id)
int rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_rxq_info *qinfo)
int rte_eth_dev_socket_id(uint16_t port_id)
int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx, uint32_t tx_rate)
uint8_t enable_default_pool
__extension__ struct rte_eth_link __rte_aligned(8)
int rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
int rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *link)
int rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
int rte_eth_dev_set_vlan_ether_type(uint16_t port_id, enum rte_vlan_type vlan_type, uint16_t tag_type)
int rte_eth_xstats_get_names_by_id(uint16_t port_id, struct rte_eth_xstat_name *xstats_names, unsigned int size, uint64_t *ids)
__rte_experimental const char * rte_eth_dev_capability_name(uint64_t capability)
__rte_experimental int rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id, uint16_t nb_rx_desc, const struct rte_eth_hairpin_conf *conf)
static uint64_t rte_eth_rss_hf_refine(uint64_t rss_hf)
__rte_experimental int rte_eth_hairpin_bind(uint16_t tx_port, uint16_t rx_port)
__rte_experimental int rte_eth_ip_reassembly_conf_set(uint16_t port_id, const struct rte_eth_ip_reassembly_params *conf)
int rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr, uint8_t on)
__rte_experimental int rte_eth_cman_config_init(uint16_t port_id, struct rte_eth_cman_config *config)
int rte_eth_rx_metadata_negotiate(uint16_t port_id, uint64_t *features)
int rte_eth_dev_rss_reta_query(uint16_t port_id, struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size)
struct rte_eth_conf::@117 rx_adv_conf
int rte_eth_promiscuous_get(uint16_t port_id)
int rte_eth_led_on(uint16_t port_id)
int rte_eth_timesync_read_tx_timestamp(uint16_t port_id, struct timespec *timestamp)
int rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask, uint32_t *ptypes, int num)
__extension__ uint8_t hw_vlan_reject_tagged
struct rte_eth_vmdq_dcb_conf::@113 pool_map[RTE_ETH_VMDQ_MAX_VLAN_FILTERS]
int rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
__rte_experimental int rte_eth_cman_config_set(uint16_t port_id, const struct rte_eth_cman_config *config)
__rte_experimental int rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id, uint16_t nb_tx_desc, const struct rte_eth_hairpin_conf *conf)
uint8_t mac_ctrl_frame_fwd
uint16_t(* rte_rx_callback_fn)(uint16_t port_id, uint16_t queue, struct rte_mbuf *pkts[], uint16_t nb_pkts, uint16_t max_pkts, void *user_param)
enum rte_eth_fc_mode mode
int rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
struct rte_eth_vmdq_dcb_conf vmdq_dcb_conf
uint8_t dcb_tc[RTE_ETH_DCB_NUM_USER_PRIORITIES]
uint8_t tx_deferred_start
int rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
uint32_t max_lro_pkt_size
int rte_eth_xstats_get_names(uint16_t port_id, struct rte_eth_xstat_name *xstats_names, unsigned int size)
struct rte_eth_fc_conf fc
const struct rte_eth_rxtx_callback * rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id, rte_rx_callback_fn fn, void *user_param)
int rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
int rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
struct rte_eth_txmode txmode
int rte_eth_allmulticast_get(uint16_t port_id)
int rte_eth_dev_is_valid_port(uint16_t port_id)
int rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
uint32_t max_lro_pkt_size
int rte_eth_timesync_enable(uint16_t port_id)
struct rte_eth_rxconf default_rxconf
static uint16_t rte_eth_tx_burst(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
struct rte_eth_hairpin_queue_cap tx_cap
__rte_experimental int rte_eth_cman_info_get(uint16_t port_id, struct rte_eth_cman_info *info)
int rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
int rte_eth_dev_set_link_down(uint16_t port_id)
int rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
uint16_t rte_eth_iterator_next(struct rte_dev_iterator *iter)
__rte_experimental int rte_eth_hairpin_unbind(uint16_t tx_port, uint16_t rx_port)
struct rte_eth_hairpin_queue_cap rx_cap
int rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
const char * rte_eth_dev_rx_offload_name(uint64_t offload)
static uint16_t rte_eth_tx_buffer_flush(uint16_t port_id, uint16_t queue_id, struct rte_eth_dev_tx_buffer *buffer)
int rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id, uint16_t nb_rx_desc, unsigned int socket_id, const struct rte_eth_rxconf *rx_conf, struct rte_mempool *mb_pool)