22 #include <sys/types.h>
29 #define RTE_PCI_CFG_SPACE_SIZE 256
30 #define RTE_PCI_CFG_SPACE_EXP_SIZE 4096
32 #define RTE_PCI_VENDOR_ID 0x00
33 #define RTE_PCI_DEVICE_ID 0x02
34 #define RTE_PCI_COMMAND 0x04
37 #define RTE_PCI_COMMAND_MASTER 0x4
40 #define RTE_PCI_EXP_DEVCTL 8
43 #define RTE_PCI_EXT_CAP_ID(header) (header & 0x0000ffff)
44 #define RTE_PCI_EXT_CAP_NEXT(header) ((header >> 20) & 0xffc)
46 #define RTE_PCI_EXT_CAP_ID_ERR 0x01
47 #define RTE_PCI_EXT_CAP_ID_DSN 0x03
48 #define RTE_PCI_EXT_CAP_ID_SRIOV 0x10
51 #define RTE_PCI_SRIOV_CAP 0x04
52 #define RTE_PCI_SRIOV_CTRL 0x08
53 #define RTE_PCI_SRIOV_INITIAL_VF 0x0c
54 #define RTE_PCI_SRIOV_TOTAL_VF 0x0e
55 #define RTE_PCI_SRIOV_NUM_VF 0x10
56 #define RTE_PCI_SRIOV_FUNC_LINK 0x12
57 #define RTE_PCI_SRIOV_VF_OFFSET 0x14
58 #define RTE_PCI_SRIOV_VF_STRIDE 0x16
59 #define RTE_PCI_SRIOV_VF_DID 0x1a
60 #define RTE_PCI_SRIOV_SUP_PGSIZE 0x1c
63 #define PCI_PRI_FMT "%.4" PRIx32 ":%.2" PRIx8 ":%.2" PRIx8 ".%" PRIx8
64 #define PCI_PRI_STR_SIZE sizeof("XXXXXXXX:XX:XX.X")
67 #define PCI_SHORT_PRI_FMT "%.2" PRIx8 ":%.2" PRIx8 ".%" PRIx8
70 #define PCI_FMT_NVAL 4
73 #define PCI_RESOURCE_FMT_NVAL 3
76 #define PCI_MAX_RESOURCE 6
101 #define RTE_PCI_ANY_ID (0xffff)
103 #define PCI_ANY_ID RTE_DEPRECATED(PCI_ANY_ID) RTE_PCI_ANY_ID
104 #define RTE_CLASS_ANY_ID (0xffffff)
119 char *output,
size_t size);
int rte_pci_addr_parse(const char *str, struct rte_pci_addr *addr)
uint16_t subsystem_device_id
void rte_pci_device_name(const struct rte_pci_addr *addr, char *output, size_t size)
uint16_t subsystem_vendor_id
int rte_pci_addr_cmp(const struct rte_pci_addr *addr, const struct rte_pci_addr *addr2)